The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that do not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
In flash memory devices, data is stored by programming the cells to different voltage levels. A k-bits-per-cell flash device stores k bits in a single cell and has 2k voltage regions with each region corresponding to one of the possible 2k k-bit patterns. A k-bit pattern is stored by programming the cell to a nominal voltage value in the corresponding voltage region. The actual stored voltage within a particular memory cell is subject to noise and hence can differ from the nominal value. The exact value of the stored voltage cannot be read out directly, but can only be compared to a read reference voltage for most practical devices. Also, the primary goal is to find the k-bit pattern corresponding to the stored voltage rather than the voltage itself. Therefore, the cells are read by comparing the stored values in the cell to one or more read reference voltages.
A floating-gate transistor of a flash memory cell is capable of storing a voltage on its floating gate for a period, typically many years. The threshold voltages that correspond to the stored charge on the floating gate of the floating-gate transistor will change over time due to, for example, physical changes in the device. Such physical changes may result from device aging, repeated erase and program cycles, and so forth. A group of flash memory cells will therefore exhibit a change in their overall threshold voltage distributions over time. Such changes will result in greater error rates, which will worsen as the device ages.